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Abstract:
为了简化IP核的设计过程,本文介绍了一种基于FPGA的中值滤波算法的IP核实现方法.针对FPGA 的特点对实现方法进行了研究,从而简化了复杂算法的IP核设计问题.实验结果表明,该IP核设计方法具有设计周期短,可靠性高等特点.
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数字技术与应用
ISSN: 1007-9416
Year: 2013
Issue: 3
Page: 192
Cited Count:
WoS CC Cited Count: 0
SCOPUS Cited Count:
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count: 2
Chinese Cited Count:
30 Days PV: 8
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