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Author:

Fang, J. (Fang, J..) | Xu, Y. (Xu, Y..) | Kong, H. (Kong, H..) | Cai, M. (Cai, M..)

Indexed by:

EI Scopus SCIE

Abstract:

Cache prefetching is a traditional way to reduce memory access latency. In multi-core systems, aggressive prefetching may harm the system. In the past, prefetching throttling strategies usually set thresholds through certain factors. When the threshold is exceeded, prefetch throttling strategies will control the aggressive prefetcher. However, these strategies usually work well in homogeneous multi-core systems and do not work well in heterogeneous multi-core systems. This paper considers the performance difference between cores under the asymmetric multi-core architecture. Through the improved hill-climbing method, the aggressiveness of prefetching for different cores is controlled, and the IPC of the core is improved. Through experiments, it is found that compared with the previous strategy, the average performance of big core is improved by more than 3%, and the average performance of little cores is improved by more than 24%. © 2023, The Author(s).

Keyword:

Cache prefetching control High-performance computing Heterogeneous multi-core system Big.LITTLE architecture

Author Community:

  • [ 1 ] [Fang J.]Faculty of Information Technology, Beijing University of Technology, Beijing, 100124, China
  • [ 2 ] [Xu Y.]Faculty of Information Technology, Beijing University of Technology, Beijing, 100124, China
  • [ 3 ] [Kong H.]Faculty of Information Technology, Beijing University of Technology, Beijing, 100124, China
  • [ 4 ] [Cai M.]Faculty of Information Technology, Beijing University of Technology, Beijing, 100124, China

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Source :

Journal of Supercomputing

ISSN: 0920-8542

Year: 2023

Issue: 10

Volume: 79

Page: 10570-10588

3 . 3 0 0

JCR@2022

ESI Discipline: COMPUTER SCIENCE;

ESI HC Threshold:19

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 4

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 9

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