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Author:

Zhao, Jin (Zhao, Jin.) | Qin, Fei (Qin, Fei.) | Chen, Zuohuan (Chen, Zuohuan.) | Yu, Daquan (Yu, Daquan.)

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CPCI-S EI

Abstract:

2.5D interposer technology has gotten a lot of attention as a viable solution to high IO density, cost, and performance challenges. The thermal management of through glass vias (TGVs) is not currently being studied as much as through glass vias (TSV) heat dissipation and microfluidic design. In this paper, a creative work for the thermal performance of the memory chips based on 2.5D packaging is comprehensively studied to investigate the heat dissipation of the package. On the one hand, the idea of integrating TGV copper pillar arrays into the glass substrate is studied and refined. In order to explore the effect of TGV copper pillars for evaluating the ability of dissipating heat, a finite element model (FEM) based on CFD theory is built. According to the results, when there are more TGV copper arrays, the maximum junction temperature steadily decreases. On the other hand, the use of steady-state heat transfer methods for detecting the package's junction temperature and the execution of corresponding control tests. The experiments indicated that the maximum junction temperature of the package can be respectively decreased by 12% and 51% when silicon-based and diamond-based heat sink materials are selected. © 2023 IEEE.

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Author Community:

  • [ 1 ] [Zhao, Jin]Beijing University of Technology, Faculty of Materials and Manufacturing, Beijing, China
  • [ 2 ] [Qin, Fei]Beijing University of Technology, Faculty of Materials and Manufacturing, Beijing, China
  • [ 3 ] [Chen, Zuohuan]Loongson Technology, Beijing, China
  • [ 4 ] [Yu, Daquan]School of Electronic Science and Engineering, Xiamen University, Xiamen, China
  • [ 5 ] [Yu, Daquan]Xiamen Sky Semiconductor, Xiamen, China

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Year: 2023

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

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Chinese Cited Count:

30 Days PV: 3

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