A　SiC　fin-channel　MOSFET　structure　(Fin-MOS)　is　proposed　for　an　enhanced　gate　shielding　effect.　The　gates　are　placed　on　each　side　of　the　narrow　fin-channel　region,　while　grounded　p-shield　regions　below　the　gates　provide　a　strong　shielding　effect.　The　device　is　investigated　using　Sentaurus　TCAD.　For　a　narrow　fin-channel　region,　there　is　difficulty　in　forming　an　Ohmic　contact　to　the　p-base;　a　floating　p-base　might　potentially　store　negative　charges　upon　high　drain　voltage,　and,　thus,　causes　threshold　voltage　instabilities.　The　simulation　reveals　that,　for　a　fin-width　of　0.2　mu　m,　the　p-shield　regions　provide　a　stringent　shielding　effect　against　high　drain　voltage,　and　the　dynamic　threshold　voltage　shift　(triangle　Vth)　is　negligible.　Compared　to　conventional　trench　MOSFET　(Trench-MOS)　and　asymmetric　trench　MOSFET　(Asym-MOS),　the　proposed　Fin-MOS　boasts　the　lowest　OFF-state　oxide　field　and　reverse　transfer　capacitance　(Crss),　while　maintaining　a　similar　low　ON-resistance.