Reconstruction　algorithms　are　an　integral　part　of　compressed　sensing　(CS)　theory,　which　can　reliably　reconstruct　the　original　signal　from　the　low-dimensional　compressed　signal.　The　orthogonal　matching　pursuit　(OMP)　algorithm　has　been　widely　studied　and　extensively　selected　in　hardware　implementations.　However,　the　low　reconstruction　success　rate　of　the　OMP　algorithm　under　high　sparsity　conditions　has　led　to　the　proposal　and　application　of　more　reconstruction　algorithms　in　hardware　implementations.　In　this　article,　a　staged　projection　refining　multiple　OMP　(SPR-MOMP)　algorithm　is　proposed　based　on　the　OMP　algorithm.　This　algorithm　improves　the　reconstruction　accuracy　by　refining　the　support　set　using　a　staged　backtracking　strategy.　It　also　employs　a　multiple-atom　selection　strategy　for　parallel　expansion　of　the　support　set,　ensuring　reconstruction　efficiency.　The　reconstruction　simulation　demonstrates　that　the　SPR-MOMP　algorithm　achieves　a　higher　reconstruction　success　rate　than　the　OMP　algorithm,　with　fewer　iterations.　A　hardware　architecture　applying　the　SPR-MOMP　algorithm　is　designed　and　implemented　on　a　Virtex　UltraScale+　field-programmable　gate　array　(FPGA)　with　N　=　1024,　M　=　256,　and　K　=　36.　The　proposed　architecture　achieves　a　reconstruction　signal-to-noise　ratio　(RSNR)　of　44.27　dB,　with　20-bit　data　width　and　15-bit　fractional　width.　The　maximum　clock　frequency　of　the　architecture　is　200　MHz,　enabling　reconstruction　within　276.6　mu　s.　The　proposed　architecture　achieves　a　lower　dynamic　power　consumption　of　1929　mW.