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Author:

Guo, Jia (Guo, Jia.) | Yan, Zijin (Yan, Zijin.) | Hou, Ligang (Hou, Ligang.) | Lv, Ang (Lv, Ang.) | Jiang, Nan (Jiang, Nan.)

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EI Scopus

Abstract:

An artificial neural network (ANN) is a parallel, distributed processing system consisting of a large number of interconnected neurons. At present, artificial neural networks have been widely used in signal processing, automation, control systems, image recognition and many other fields. Usually, the realization of neural networks is based on software. However, because the software implementation method cannot achieve real-time calculation in many cases, the hardware implementation method can reflect the inherent parallel processing characteristics of neural networks. This paper proposes an ANN neural network field programmable neuron array based on the design of reusable ANN artificial neural network IP core. It not only can save a lot of hardware resources and improve processing speed, but also has a rapid development cycle and good reconfigurability and other advantages. © 2018 IEEE.

Keyword:

Image recognition Signal processing Neural networks Field programmable gate arrays (FPGA) Neurons Integrated circuits

Author Community:

  • [ 1 ] [Guo, Jia]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 2 ] [Yan, Zijin]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 3 ] [Hou, Ligang]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 4 ] [Lv, Ang]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
  • [ 5 ] [Jiang, Nan]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China

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Year: 2018

Language: English

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ESI Highly Cited Papers on the List: 0 Unfold All

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30 Days PV: 12

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