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Author:

Ji, Fang (Ji, Fang.) | Li, Xing-Yuan (Li, Xing-Yuan.) | Yang, Chang-Long (Yang, Chang-Long.)

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EI Scopus

Abstract:

In view of the problem that the AVS encoding architecture on multi-cores have a high level of the intricacy, according to the data dependency of the encoding modules, combining with the advantages of the multi-core system in FPGA, a parallel algorithm based on GOP is proposed. This article built a single-core system based on XILINX FPGA first, then transplanted the AVS reference code RM5.2 to this system, and achieved the data of this single core system. After that, this article built a three-core system on that single-core system and achieved the algorithm based on GOP on the embedded system structure. The experimental results show that the parallel algorithm can effectively improve the speedup and the image quality is almost the same. © 2013 IEEE.

Keyword:

Signal encoding Field programmable gate arrays (FPGA) Image enhancement Parallel algorithms Encoding (symbols)

Author Community:

  • [ 1 ] [Ji, Fang]College of Computer Science and Technology, Beijing University of Technology, Beijing, China
  • [ 2 ] [Li, Xing-Yuan]College of Software, Beijing University of Technology, Beijing, China
  • [ 3 ] [Yang, Chang-Long]College of Software, Beijing University of Technology, Beijing, China

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Source :

Year: 2013

Page: 1521-1524

Language: English

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 2

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 9

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