Design of a multistage amplifier with high gain and wide bandwidth performance - Details

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EI Scopus

Abstract：

A　high　performance　design　of　a　three-stage　amplifier　is　presented　in　this　paper　using　the　Impedance　Adapting　Compensation　(IAC).　The　circuit　is　designed　in　0.35um　CMOS　technology　with　3.3V　voltage　power　supply.　When　driving　a　150pF　capacitive　load,　this　amplifier　achieves　as　high　as　144dB　dc　gain,7.44MHz　gain-bandwidth　product　(GBW)　,60°phase　margin(PM),1.26V/us　slew　rate　(SR)　and　0.95mW　power　dissipation.　This　work　provides　a　higher　dc　gain　and　wider　GBW　compared　to　other　multistage　amplifiers.　©2012　IEEE.

Keyword：

Amplifiers (electronic) Engineering Bandwidth

Author Community：

[ 1 ] [Lv, Benqiang]VLSI and System Laboratory, Beijing University of Technology, Beijing, China
[ 2 ] [Peng, Xiaohong]VLSI and System Laboratory, Beijing University of Technology, Beijing, China
[ 3 ] [Zhu, Zhiding]VLSI and System Laboratory, Beijing University of Technology, Beijing, China
[ 4 ] [Li, Xiaoqing]VLSI and System Laboratory, Beijing University of Technology, Beijing, China
[ 5 ] [Hu, Yong]VLSI and System Laboratory, Beijing University of Technology, Beijing, China
[ 6 ] [Liu, Yunkang]VLSI and System Laboratory, Beijing University of Technology, Beijing, China