Neural network based power estimation on chip specification - Details

Author：

Hou, Ligang (Hou, Ligang.) | Wu, Xinyi (Wu, Xinyi.) | Wu, Wuchen (Wu, Wuchen.) (Scholars：吴武臣)

Indexed by：

EI Scopus

Abstract：

This　paper　forwards　a　neural　network　based　VLSI　power　estimation　on　VLSI　chip　specification.　This　paper　used　neural　network　to　perform　VLSI　power　estimation.　Experiments　were　made　on　chip　specification　parameters　extracted　from　the　datasheet　of　TI　series　micro-controllers.　Different　net　structure,　training　plans　and　vector　organizations　were　applied.　Based　on　limited　number　of　test　vector,　experimental　results　showed　the　neural　network　based　power　estimation　could　give　acceptable　results　on　chip　power　with　specific　net　structure.　This　method　can　achieve　a　much　faster　power　estimation　result　on　datasheet　of　the　same　kind　of　VLSI　chips　without　simulation　and　analysis　or　simulations　of　detail　structure　and　interconnections.　Higher　training/testing　ratio　leads　to　a　more　accurate　power　estimation　value.

Keyword：

Neural networks VLSI circuits Specifications

Author Community：

[ 1 ] [Hou, Ligang]VLSI and System Lab, Beijing University of Technology, Beijing, China
[ 2 ] [Wu, Xinyi]VLSI and System Lab, Beijing University of Technology, Beijing, China
[ 3 ] [Wu, Wuchen]VLSI and System Lab, Beijing University of Technology, Beijing, China