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学者姓名：方娟
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Abstract ：
Normally, threads in a warp do not severely interfere with each other. However, the scheduler must wait until all the threads within complete before scheduling the next warp, resulting in memory divergence. The crux of the problem is scheduling the warp in a more reasonable order. Therefore, we propose a new warp scheduling strategy called WSMP, which is based on multi-level feedback queue (MFQ) and perceptron-based prefetch filtering (PPF). All the warps are sorted beforehand according to the latency tolerance of the warps and pushed into a certain queue in MFQ. We also remold PPF to enhance the modified underlying prefetcher. We are able to strike a balance between cache hit rate and prefetch coverage then. We verify its feasibility using GPGPU-Sim, along with exclusive GPGPU workload. The results show that compared to the baseline, WSMP improves IPC by 26.45% and reduces L2 cache miss rate by 9.54% on average.
Keyword ：
Latency tolerance Latency tolerance Warp scheduling Warp scheduling PPF PPF Multi-level feedback queue Multi-level feedback queue
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| GB/T 7714 | Fang, Juan , Zhao, Li'ang , Cai, Min et al. WSMP: a warp scheduling strategy based on MFQ and PPF [J]. | JOURNAL OF SUPERCOMPUTING , 2023 , 79 (11) : 12317-12340 . |
| MLA | Fang, Juan et al. "WSMP: a warp scheduling strategy based on MFQ and PPF" . | JOURNAL OF SUPERCOMPUTING 79 . 11 (2023) : 12317-12340 . |
| APA | Fang, Juan , Zhao, Li'ang , Cai, Min , Yang, Huijing . WSMP: a warp scheduling strategy based on MFQ and PPF . | JOURNAL OF SUPERCOMPUTING , 2023 , 79 (11) , 12317-12340 . |
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Abstract ：
When multiple central processing unit (CPU) cores and integrated graphics processing units (GPUs) share off-chip main memory, CPU and GPU applications compete for the critical memory resource. This causes serious resource competition and has a negative impact on the overall performance of the system. We describe the competition for shared-memory resources in a CPU-GPU heterogeneous multi-core architecture, and a shared-memory request scheduling strategy based on perceptual and predictive batch-processing is proposed. By sensing the CPU and GPU memory request conditions in the request buffer, the proposed scheduling strategy estimates the GPU latency tolerance and reduces mutual interference between CPU and GPU by processing CPU or GPU memory requests in batches. According to the simulation results, the scheduling strategy improves CPU performance by 8.53% and reduces mutual interference by 10.38% with low hardware complexity.
Keyword ：
Unified memory Unified memory TP391 TP391 CPU-GPU heterogeneous CPU-GPU heterogeneous 9 9 Multi-core Multi-core Access scheduling Access scheduling
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| GB/T 7714 | Fang, Juan , Lin, Sheng , Yang, Huijing et al. A perceptual and predictive batch-processing memory scheduling strategy for a CPU-GPU heterogeneous system [J]. | FRONTIERS OF INFORMATION TECHNOLOGY & ELECTRONIC ENGINEERING , 2023 , 24 (7) : 994-1006 . |
| MLA | Fang, Juan et al. "A perceptual and predictive batch-processing memory scheduling strategy for a CPU-GPU heterogeneous system" . | FRONTIERS OF INFORMATION TECHNOLOGY & ELECTRONIC ENGINEERING 24 . 7 (2023) : 994-1006 . |
| APA | Fang, Juan , Lin, Sheng , Yang, Huijing , Xu, Yixiang , Su, Xing . A perceptual and predictive batch-processing memory scheduling strategy for a CPU-GPU heterogeneous system . | FRONTIERS OF INFORMATION TECHNOLOGY & ELECTRONIC ENGINEERING , 2023 , 24 (7) , 994-1006 . |
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Abstract ：
In recent years, biometric radar has gained increasing attention in the field of non-touch vital sign monitoring due to its high accuracy and strong ability to detect fine-grained movements. However, most current research on biometric radar can only achieve heart rate or respiration rate monitoring in static environments, which have strict monitoring requirements and single monitoring parameters. Moreover, most studies have not applied the collected data despite their significant potential for applications. In this paper, we introduce a non-touch motion-robust vital sign monitoring system via ultra-wideband (UWB) radar based on deep learning. Nmr-VSM not only enables multi-dimensional vital sign monitoring under human motion environments but also implements cardiac anomaly detection. The design of Nmr-VSM includes three key components. Firstly, we design a UWB radar that can perform multi-dimensional vital sign monitoring, including heart rate, respiratory rate, distance, and motion status. Secondly, we collect real experimental data and analyze the impact of eight factors, such as motion status and distance, on heart rate monitoring. We then propose a deep neural network (DNN)-based heart rate data correction model that achieves high robustness in motion environments. Finally, we model the heart rate variability (HRV) of the human body and propose a convolutional neural network (CNN)-based anomaly detection model that achieves low-latency detection of heart diseases, such as ventricular tachycardia and ventricular fibrillation. Experimental results in a real environment demonstrate that Nmr-VSM can not only accurately monitor heart rate but also achieve anomaly detection with low latency.
Keyword ：
heart rate data correction heart rate data correction multi-dimensional vital sign multi-dimensional vital sign non-touch vital sign monitoring non-touch vital sign monitoring anomaly detection anomaly detection ultra-wideband (UWB) radar ultra-wideband (UWB) radar
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| GB/T 7714 | Yuan, Zhonghang , Lu, Shuaibing , He, Yi et al. Nmr-VSM: Non-Touch Motion-Robust Vital Sign Monitoring via UWB Radar Based on Deep Learning [J]. | MICROMACHINES , 2023 , 14 (7) . |
| MLA | Yuan, Zhonghang et al. "Nmr-VSM: Non-Touch Motion-Robust Vital Sign Monitoring via UWB Radar Based on Deep Learning" . | MICROMACHINES 14 . 7 (2023) . |
| APA | Yuan, Zhonghang , Lu, Shuaibing , He, Yi , Liu, Xuetao , Fang, Juan . Nmr-VSM: Non-Touch Motion-Robust Vital Sign Monitoring via UWB Radar Based on Deep Learning . | MICROMACHINES , 2023 , 14 (7) . |
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Abstract ：
Increasing the number of cores on a chip is one way to solve the bottleneck of exponential growth but an excessive number of cores can lead to problems such as communication blockage and overheating of the chip. Currently, networks-on-chip (NoC) can offer an effective solution to the problem of the communication bottleneck within the chip. With current advancements in IC manufacturing technology, chips can now be 3D-stacked in order to increase chip throughput as well as reduce power consumption while reducing the area of the chip. Automating the mapping of applications into 3D NoC topologies is an important new direction for research in the field of 3D NoC. In this paper, a 3D NoC partitioning algorithm is proposed, which can delineate the 3D NoC region to be mapped. Additionally, a double particle swarm optimization (DPSO) based heuristic algorithm is proposed, which can integrate the characteristics of neighborhood search and genetic algorithms, and thus solve the problem of a particle swarm algorithm falling into local optimal solutions. It is experimentally demonstrated that this DPSO-based hybrid optimization algorithm has a higher throughput rate and lower energy loss than the traditional heuristic algorithm.
Keyword ：
gene cross-mutation gene cross-mutation neighborhood search neighborhood search particle swarm optimization particle swarm optimization 3D NoC 3D NoC high performance computing high performance computing
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| GB/T 7714 | Fang, Juan , Cai, Huayi , Lv, Xin . Hybrid Optimization Algorithm Based on Double Particle Swarm in 3D NoC Mapping [J]. | MICROMACHINES , 2023 , 14 (3) . |
| MLA | Fang, Juan et al. "Hybrid Optimization Algorithm Based on Double Particle Swarm in 3D NoC Mapping" . | MICROMACHINES 14 . 3 (2023) . |
| APA | Fang, Juan , Cai, Huayi , Lv, Xin . Hybrid Optimization Algorithm Based on Double Particle Swarm in 3D NoC Mapping . | MICROMACHINES , 2023 , 14 (3) . |
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Abstract ：
Hardware prefetching and replacement policies are two techniques to improve the performance of the memory subsystem. While prefetching hides memory latency and improves performance, interactions take place with the cache replacement policies, thereby introducing performance variability in the application. To improve the accuracy of reuse of cache blocks in the presence of hardware prefetching, we propose Prefetch-Adaptive Intelligent Cache Replacement Policy (PAIC). PAIC is designed with separate predictors for prefetch and demand requests, and uses machine learning to optimize reuse prediction in the presence of prefetching. By distinguishing reuse predictions for prefetch and demand requests, PAIC can better combine the performance benefits from prefetching and replacement policies. We evaluate PAIC on a set of 27 memory-intensive programs from the SPEC 2006 and SPEC 2017. Under single-core configuration, PAIC improves performance over Least Recently Used (LRU) replacement policy by 37.22%, compared with improvements of 32.93% for Signature-based Hit Predictor (SHiP), 34.56% for Hawkeye, and 34.43% for Glider. Under the four-core configuration, PAIC improves performance over LRU by 20.99%, versus 13.23% for SHiP, 17.89% for Hawkeye and 15.50% for Glider.
Keyword ：
machine learning machine learning Prefetch-Adaptive Intelligent Cache Replacement Policy (PAIC) Prefetch-Adaptive Intelligent Cache Replacement Policy (PAIC) hardware prefetching hardware prefetching replacement policy replacement policy
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| GB/T 7714 | Yang, Hui-Jing , Fang, Juan , Cai, Min et al. A Prefetch-Adaptive Intelligent Cache Replacement Policy Based on Machine Learning [J]. | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY , 2023 , 38 (2) : 391-404 . |
| MLA | Yang, Hui-Jing et al. "A Prefetch-Adaptive Intelligent Cache Replacement Policy Based on Machine Learning" . | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 38 . 2 (2023) : 391-404 . |
| APA | Yang, Hui-Jing , Fang, Juan , Cai, Min , Cai, Zhi . A Prefetch-Adaptive Intelligent Cache Replacement Policy Based on Machine Learning . | JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY , 2023 , 38 (2) , 391-404 . |
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Abstract ：
With the rapid development of heterogeneous network-on-chip (NoC), a vast amount of shared resources are integrated into NoC. Intense resource competition exists between CPUs and GPUs, leading to congestion and a decrease in overall network performance. Reasonable node placement can minimize network conflicts at the topology level. This paper first discusses the placement of shared last-level cache and memory controller, then selects a more rational placement method and optimizes the path. To solve the hot spots problem in center placement method, a task-based routing algorithm is designed to plan the path. Simulation results demonstrate that, compared to the traditional routing algorithm, the overall network latency is reduced by 9%, and the CPU performance is improved by 13.6%. Furthermore, a dynamic task-based routing algorithm is proposed. Compared to the static task routing algorithm, the overall network latency is reduced by 2.08%, and the CPU performance is improved by 4.09%.
Keyword ：
Routing algorithm Routing algorithm Network-on-chip (NoC) Network-on-chip (NoC) Task-based Task-based Heterogeneous architectures Heterogeneous architectures
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| GB/T 7714 | Fang, Juan , Wei, Zhichao , Liu, Yaqi et al. TB-TBP: a task-based adaptive routing algorithm for network-on-chip in heterogenous CPU-GPU architectures [J]. | JOURNAL OF SUPERCOMPUTING , 2023 , 80 (5) : 6311-6335 . |
| MLA | Fang, Juan et al. "TB-TBP: a task-based adaptive routing algorithm for network-on-chip in heterogenous CPU-GPU architectures" . | JOURNAL OF SUPERCOMPUTING 80 . 5 (2023) : 6311-6335 . |
| APA | Fang, Juan , Wei, Zhichao , Liu, Yaqi , Hou, Yumin . TB-TBP: a task-based adaptive routing algorithm for network-on-chip in heterogenous CPU-GPU architectures . | JOURNAL OF SUPERCOMPUTING , 2023 , 80 (5) , 6311-6335 . |
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Abstract ：
Heterogeneous multi-core Network-on-Chip provides high-speed execution and performance to meet the heavy communication demands of the system. However, the system power consumption and delay increase as the number of cores rises. In this paper, we present KL_SA, a mapping scheme based on the Kernighan-Lin (KL) and Simulated Annealing (SA) algorithms, aiming at the mapping optimization problem on heterogeneous multi-core Network-on-Chip. This scheme combines the advantages of the KL algorithm's efficient partitioning and the SA algorithm's global search for optimal solution and improves the latter in turn. Firstly, we divide the task using KL algorithm, with which result to initial the mapping of the SA algorithm, solving the random initialization problem in the SA algorithm, also increasing the likelihood of getting the optimal solution. Secondly, we do the mapping using the SA algorithm with memory function added in the iterative process. In this way, the current best state is memorized without losing the current optimal solution when escaping from the local optimum, ensuring the global optimal approximate solution obtained. Experiments show large savings in the aspects of system power consumption and delay on the system with the proposed mapping scheme compared to the existing mapping schemes.
Keyword ：
Network on chip Network on chip Global optimal approximate solution Global optimal approximate solution Mapping optimization Mapping optimization KL_SA algorithm KL_SA algorithm
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| GB/T 7714 | Fang, Juan , Zhao, Haoyan , Zhang, Jiayue et al. A Heterogeneous Multi-core Network-on-Chip Mapping Optimization Algorithm [J]. | ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2021, PT I , 2022 , 13155 : 370-384 . |
| MLA | Fang, Juan et al. "A Heterogeneous Multi-core Network-on-Chip Mapping Optimization Algorithm" . | ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2021, PT I 13155 (2022) : 370-384 . |
| APA | Fang, Juan , Zhao, Haoyan , Zhang, Jiayue , Shi, Jiamei . A Heterogeneous Multi-core Network-on-Chip Mapping Optimization Algorithm . | ALGORITHMS AND ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP 2021, PT I , 2022 , 13155 , 370-384 . |
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Abstract ：
In an asymmetric multi-core architecture, multiple heterogeneous cores share the last-level cache (LLC). Due to the different memory access requirements among heterogeneous cores, the LLC competition is more intense. In the current work, we propose a heterogeneity-aware replacement policy for the partitioned cache (HAPC), which reduces the mutual interference between cores through cache partitioning, and tracks the shared reuse state of each cache block within the partition at runtime to guide the replacement policy to keep cache blocks shared by multiple cores in multithreaded programs. In the process of updating the reuse state, considering the difference of memory accesses to LLC by heterogeneous cores, the cache replacement policy tends to keep cache blocks required by big cores, to better improve the LLC access efficiency of big cores. Compared with LRU and the SRCP, which are the state-of-the-art cache replacement algorithms, the performance of big cores can be significantly improved by HAPC when running multithreaded programs, while the impact on little cores is almost negligible, thus improving the overall performance of the system.
Keyword ：
heterogeneity-aware heterogeneity-aware asymmetric multi-core asymmetric multi-core last-level cache last-level cache replacement policy replacement policy
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| GB/T 7714 | Fang, Juan , Kong, Han , Yang, Huijing et al. A Heterogeneity-Aware Replacement Policy for the Partitioned Cache on Asymmetric Multi-Core Architectures [J]. | MICROMACHINES , 2022 , 13 (11) . |
| MLA | Fang, Juan et al. "A Heterogeneity-Aware Replacement Policy for the Partitioned Cache on Asymmetric Multi-Core Architectures" . | MICROMACHINES 13 . 11 (2022) . |
| APA | Fang, Juan , Kong, Han , Yang, Huijing , Xu, Yixiang , Cai, Min . A Heterogeneity-Aware Replacement Policy for the Partitioned Cache on Asymmetric Multi-Core Architectures . | MICROMACHINES , 2022 , 13 (11) . |
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Abstract ：
The vigorous development of IoT technology has spawned a series of applications that are delay-sensitive or resource-intensive. Mobile edge computing is an emerging paradigm which provides services between end devices and traditional cloud data centers to users. However, with the continuously increasing investment of demands, it is nontrivial to maintain a higher quality-of-service (QoS) under the erratic activities of mobile users. In this paper, we investigate the service provisioning and updating problem under the multiple-users scenario by improving the performance of services with longterm cost constraints. We first decouple the original long-term optimization problem into a per-slot deterministic one by using Lyapunov optimization. Then, we propose two service updating decision strategies by considering the trajectory prediction conditions of users. Based on that, we design an online strategy by utilizing the committed horizon control method looking forward to multiple slots predictions. We prove the performance bound of our online strategy theoretically in terms of the trade-off between delay and cost. Extensive experiments demonstrate the superior performance of the proposed algorithm.
Keyword ：
mobile edge computing mobile edge computing mobility mobility quality-of-service (QoS) quality-of-service (QoS) online service provisioning online service provisioning
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| GB/T 7714 | Lu, Shuaibing , Wu, Jie , Lu, Pengfan et al. Online Service Provisioning and Updating in QoS-aware Mobile Edge Computing [J]. | 2022 18TH INTERNATIONAL CONFERENCE ON MOBILITY, SENSING AND NETWORKING, MSN , 2022 : 247-254 . |
| MLA | Lu, Shuaibing et al. "Online Service Provisioning and Updating in QoS-aware Mobile Edge Computing" . | 2022 18TH INTERNATIONAL CONFERENCE ON MOBILITY, SENSING AND NETWORKING, MSN (2022) : 247-254 . |
| APA | Lu, Shuaibing , Wu, Jie , Lu, Pengfan , Shi, Jiamei , Wang, Ning , Fang, Juan . Online Service Provisioning and Updating in QoS-aware Mobile Edge Computing . | 2022 18TH INTERNATIONAL CONFERENCE ON MOBILITY, SENSING AND NETWORKING, MSN , 2022 , 247-254 . |
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Abstract ：
Visual classification for medical images has been dominated by convolutional neural networks (CNNs) for years. Though they have shown great performance on accuracy, some of them provide decisions that are hard to explain while others encode information from irrelevant or noisy regions. In this work, we try to close this gap by proposing an explainable framework which consists of a predictor and an explainable tool, so as to provide accurate diagnoses with intuitive visualization maps and prediction basis. Specifi-cally, the predictor is designed by applying attention mechanisms to multi-scale features so as to learn and discover class discriminative latent representations that are close to each brain volume's label. Mean-while, to explain our predictor, we propose the novel explainable tool which includes a high-resolution visualization method and a prediction-basis creation and retrieval module. The former effectively inte-grates the feature maps of intermediate layers as well as the last convolutional layer, which surpasses state-of-the-art visualization approaches in producing high-resolution representations with more accu-rate localization of discriminative areas. While the latter provides prediction basis evidence via retrieved volumes with similar latent representations which are accessible to neurologists. Extensive experiments show that the proposed framework achieves higher level of accuracy and explainability over other state-of-the-art solutions. More importantly, it localizes crucial brain areas with clearer boundaries, less noises, which matches background knowledge in the neuroscience literature.(c) 2022 Elsevier Ltd. All rights reserved.
Keyword ：
Explainable neural networks Explainable neural networks High-resolution heatmap High-resolution heatmap MRI MRI XAI XAI
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| GB/T 7714 | Yu, Lu , Xiang, Wei , Fang, Juan et al. A novel explainable neural network for Alzheimer?s disease diagnosis * [J]. | PATTERN RECOGNITION , 2022 , 131 . |
| MLA | Yu, Lu et al. "A novel explainable neural network for Alzheimer?s disease diagnosis *" . | PATTERN RECOGNITION 131 (2022) . |
| APA | Yu, Lu , Xiang, Wei , Fang, Juan , Chen, Yi-Ping Phoebe , Zhu, Ruifeng . A novel explainable neural network for Alzheimer?s disease diagnosis * . | PATTERN RECOGNITION , 2022 , 131 . |
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