Abstract:
本文使用直接数字频率合成器(DDS)设计和实现正弦信号发生器,并用VHDL硬件语言描述,以Altera Cyclone FPGA EP1C3T144C8作为硬件载体,配合锁相环和高速DAC TH5565芯片实现了正弦信号发生器.
Keyword:
Reprint Author's Address:
Email:
Source :
科技信息(学术版)
ISSN: 1001-9960
Year: 2008
Issue: 15
Page: 83-84
Cited Count:
WoS CC Cited Count: 0
SCOPUS Cited Count:
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count: 3
Chinese Cited Count:
30 Days PV: 4
Affiliated Colleges: