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本文阐述了AHB总线和USB总线的数据传输规范,给出了USBCORE与AHB总线连接的结构框图,提出模块的设计思路并用硬件描述语言Verilog HDL实现了模块的编码及功能仿真.
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仪器仪表用户
ISSN: 1671-1041
Year: 2006
Issue: 1
Volume: 13
Page: 39-40
Cited Count:
WoS CC Cited Count: 0
SCOPUS Cited Count:
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count: 4
Chinese Cited Count:
30 Days PV: 9
Affiliated Colleges: