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Author:

He, Min (He, Min.) | Peng, Xiaohong (Peng, Xiaohong.) | Li, Xiaodan (Li, Xiaodan.) | Wang, Rui (Wang, Rui.) | Du, Jianing (Du, Jianing.)

Indexed by:

CPCI-S

Abstract:

This article introduces the basic concept of on-chip programmable system and explains how to use ARM Design Start IP core to design peripherals on FPGA to build your own system, focusing on the description of AHB peripheral modules and implementation of software. This paper presents a network system built with W5500 chip and ARM Cortex M0 soft core, which is simple in structure and easy to implement.

Keyword:

ARM SOPC FPGA Ethernet

Author Community:

  • [ 1 ] [He, Min]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China
  • [ 2 ] [Peng, Xiaohong]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China
  • [ 3 ] [Li, Xiaodan]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China
  • [ 4 ] [Wang, Rui]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China
  • [ 5 ] [Du, Jianing]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China

Reprint Author's Address:

  • [Peng, Xiaohong]Beijing Univ Technol, VLSI & Syst Lab, Beijing 100124, Peoples R China

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Source :

PROCEEDINGS OF 2018 12TH IEEE INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY, AND IDENTIFICATION (ASID)

ISSN: 2163-5048

Year: 2018

Page: 107-110

Language: English

Cited Count:

WoS CC Cited Count: 1

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 7

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