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Author:

Wu, Qiang (Wu, Qiang.) | Zhao, Shuxin (Zhao, Shuxin.)

Indexed by:

CPCI-S

Abstract:

Transferring Image data and Video data will expend a lot of bandwidth. this article raise an AXI DMA high speed communication interface design based on Zynq-7000. Compared with traditional DSP+FPGA architecture, the new Zynq7000 has many superiority. such as low cost, low power, low develop difficulty, software and hardware re-custom. User can create a new IP as they want. this method decreases the number of digital IC and devices. This system use AXI DMA interface as a bridge communicating with DDR3 SDRAM and FPGA. On the basis of test, the speed of AXI DMA interface can reach 298MB/s. it can absolutely replace traditional Serial RapidIO and EMIF(External Memory Interface) in DSP+FPGA architecture.

Keyword:

PS Zynq7000 FPGA PL AXI DMA Image

Author Community:

  • [ 1 ] [Wu, Qiang]Beijing Univ Technol, Qiang Wu 100124, Peoples R China
  • [ 2 ] [Zhao, Shuxin]Beijing Univ Technol, Shuxin Zhao 100124, Peoples R China

Reprint Author's Address:

  • [Wu, Qiang]Beijing Univ Technol, Qiang Wu 100124, Peoples R China

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Source :

PROCEEDINGS OF THE 2016 2ND WORKSHOP ON ADVANCED RESEARCH AND TECHNOLOGY IN INDUSTRY APPLICATIONS

ISSN: 2352-5401

Year: 2016

Volume: 81

Page: 1491-1495

Language: English

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 9

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