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Author:

Bao Zhenshan (Bao Zhenshan.) | Chen Chong (Chen Chong.) | Zhang Wenbo (Zhang Wenbo.) | Liu Jianli (Liu Jianli.) | Becker, Brett A. (Becker, Brett A..)

Indexed by:

CPCI-S

Abstract:

As CPU processing speed has slowed down year-on-year, heterogeneous "CPU-GPU" architectures combining multi-core CPU and GPU accelerators have become increasingly attractive. Under this backdrop, the Heterogeneous System Architecture (HSA) standard was released in 2012. New Accelerated Processing Unit (APU) architectures - AMD Kaveri and Carrizo - were released in 2014 and 2015 respectively, and are compliant with HSA. These architectures incorporate two technologies central to HSA, hUMA (heterogeneous Unified Memory Access) and hQ (heterogeneous Queuing). This paper summarizes the detailed processes of hQ by analyzing the AMDKFD kernel source code. Furthermore, this paper also presents hQ performance indexes obtained by running matrix-vector multiplications on Kaveri and Carrizo experiment platforms. The experimental results show that hQ can prevent the system from falling into kernel mode as much as possible without additional overhead. We find that compared with Kaveri, the Carrizo architecture provides better HSA performance.

Keyword:

heterogeneous Queuing (hQ) HSA APU heterogeneous computing

Author Community:

  • [ 1 ] [Bao Zhenshan]Beijing Univ Technol, Coll Comp Sci, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 2 ] [Chen Chong]Beijing Univ Technol, Coll Comp Sci, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 3 ] [Zhang Wenbo]Beijing Univ Technol, Coll Comp Sci, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 4 ] [Liu Jianli]Beijing Univ Technol, Coll Comp Sci, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 5 ] [Liu Jianli]Beijing Univ Technol, Beijing Dublin Int Coll, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 6 ] [Becker, Brett A.]Beijing Univ Technol, Beijing Dublin Int Coll, 100 Ping Le Yuan, Beijing 100124, Peoples R China
  • [ 7 ] [Becker, Brett A.]Univ Coll Dublin, Dublin 4, Ireland

Reprint Author's Address:

  • [Bao Zhenshan]Beijing Univ Technol, Coll Comp Sci, 100 Ping Le Yuan, Beijing 100124, Peoples R China

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Source :

2016 INTERNATIONAL CONFERENCE ON INFORMATION ENGINEERING AND COMMUNICATIONS TECHNOLOGY (IECT 2016)

Year: 2016

Page: 157-162

Language: English

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 8

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