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Author:

Zhao, J. (Zhao, J..) | Chen, Z. (Chen, Z..) | Qin, F. (Qin, F..) | Yu, D. (Yu, D..)

Indexed by:

EI Scopus SCIE

Abstract:

2.5D interposer technology has gotten a lot of attention as a viable solution to high IO density, cost, and performance challenges. Glass is a potential choice as an interposer material in an integrated package, with low dielectric loss and simple processing, it can be a low-cost alternative to silicon interposer. In this paper, a 2.5D package using glass interposer with a size of 10 mm × 15 mm × 0.8 mm is developed. The interposer with through glass via (TGV) technology simplifies the process and dramatically reduces manufacturing costs, which is especially important for the system in package. Several key processes are developed and discussed. To optimize the wafer level warpage problem, finite element modeling is used to simulate the warpage of glass wafers and optimize the process parameters and material parameters. Finally, the package level reliability tests are conducted on the 2.5D packages, after pro-conditional level 3 and temperature cycling tests, and the final packages pass the reliability tests without significant failure mode, which provides an important reference value for the subsequent mass-production of the TGV interposer. © 2023, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.

Keyword:

Author Community:

  • [ 1 ] [Zhao J.]Faculty of Materials and Manufacturing, Institute of Electronics Packaging Technology and Reliability, Beijing University of Technology, Beijing, 100124, China
  • [ 2 ] [Chen Z.]Loongson Technology, Beijing, 100089, China
  • [ 3 ] [Qin F.]Faculty of Materials and Manufacturing, Institute of Electronics Packaging Technology and Reliability, Beijing University of Technology, Beijing, 100124, China
  • [ 4 ] [Yu D.]School of Electronic Science and Engineering, Xiamen University, Xiamen, 361005, China
  • [ 5 ] [Yu D.]Xiamen Sky Semiconductor Technology Co., Ltd, Xiamen, 361005, China

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Source :

Journal of Materials Science: Materials in Electronics

ISSN: 0957-4522

Year: 2023

Issue: 25

Volume: 34

2 . 8 0 0

JCR@2022

ESI Discipline: MATERIALS SCIENCE;

ESI HC Threshold:26

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count: 6

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 16

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