Approximate　computing　based　on　majority　logic　(ML)　is　an　effective　solution　for　achieving　high-performance　computing　and　saving　resources　of　real-time　applications.　This　paper　we　propose　novel　designs　of　four　approximate　5:2　compressors　using　three　different　techniques.　These　new　designs　can　achieve　simpler　circuit　structures　and　minimize　output　errors.　Compared　to　similar　designs,　the　proposed　approximate　5:2　compressors　achieve　a　58%　increase　in　accuracy.　Furthermore,　a　unique　partial　product　compression　circuit　is　constructed　based　on　the　proposed　approximate　5:2　compressor,　leading　to　an　efficient　approximate　multiplier　design.　Compared　to　previous　designs,　the　four　proposed　approximate　multipliers　reduce　the　normalized　average　error　distance　by　41.3%.　In　addition,　the　feasibility　of　the　proposed　approximate　5:2　compressor　and　multiplier　was　verified　using　the　QCADesigner　platform.　The　proposed　approximate　5:2　compressors　exhibit　an　average　decrease　in　area　of　68.5%　compared　to　previous　designs.　Moreover,　the　proposed　approximate　multiplier　was　applied　to　image　multiplication　using　MATLAB.　It　was　found　that　compared　to　previous　similar　designs,　the　proposed　method　achieved　a　27.2%　improvement　in　peak　signal-to-noise　ratio　(PSNR)　and　a　12.6%　improvement　in　the　structural　similarity　index　(SSIM),　resulting　in　higher-quality　images.　　©　2024　IEEE.