For　SiC　MOSFETs,　either　multi-chip　modules　or　multiple　discrete　devices　need　to　be　connected　in　parallel　to　achieve　high　current　capacities.　However,　the　current　imbalance　that　occurs　in　parallel　applications　can　reduce　device　reliability.　This　paper　focused　on　the　effects　of　both　temperature　inhomogeneity　and　gate　trap　charge　on　the　current　imbalance　behavior　of　SiC　MOSFETs,　and　it　also　presented　a　comparison　study　of　the　effects　of　threshold　voltage　differences　on　the　current　inhomogeneity.　Finally,　the　effects　of　the　three　factors　above　on　the　current　inhomogeneity　characteristics　of　SiC　MOSFETs　were　compared　in　terms　of　their　voltage　and　time　dimensions.　The　results　show　that　the　percentage　of　the　drain-source　current　imbalance　due　to　temperature　inhomogeneity　for　static　processes　can　be　maintained　consistently　at　more　than　10%.　For　dynamic　processes,　the　percentage　of　the　drain-source　current　imbalance　due　to　temperature　inhomogeneity　can　similarly　exceed　10%.