The　multi-channel　time-interleaved　analog-to-digital　converter　(TIADC)　makes　creating　high-resolution　and　high-speed　ADC　possible.　This　paper　adopts　a　known　low　frequency　sinusoidal　test　signal　and　the　FxLMS　algorithm　to　calibrate　the　timing　mismatches　in　a　two-channel　TIADC.　By　adopting　this　method,　the　timing　error　which　is　centralized　in　the　mid-frequency　band　can　be　easily　corrected.　This　calibration　algorithm　requires　a　slightly　oversampled　input　signal　to　produce　a　mismatch　band.　Through　the　numerical　simulation　in　MATLAB　and　the　measurement　on　a　FPGA　testing　board,　the　validity　of　this　calibration　technique　was　proved.　©　2016　IEEE.