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Author:

Fang, Juan (Fang, Juan.) (Scholars:方娟) | Wang, Xiaocui (Wang, Xiaocui.)

Indexed by:

EI Scopus

Abstract:

In order to improve the performance of processor there are many studies in improving the utilization of L2 Cache. The studies show that a good prefetching mechanism is one of the most effective ways to improve the performance of L2 Cache. In this paper, we introduce a Prefetching Coordinator in multi-level storage architecture. It monitors the L2 Cache access patterns as well as the L2 Cache status, and dynamically adjusts the aggressiveness of the L2 Cache prefetching activities so as to improve the performance of all system. Then we introduce it into multi-core processor. In our study, we make an improvement in prefetching coordinator according to the specialty of multi-processor, which enhances the utilization of L2 Cache and needs no additional cost. © 2010 IEEE.

Keyword:

Cache memory Multiprocessing systems

Author Community:

  • [ 1 ] [Fang, Juan]College of Computer Science, Beijing University of Technology, Beijing, 100124, China
  • [ 2 ] [Wang, Xiaocui]College of Computer Science, Beijing University of Technology, Beijing, 100124, China

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Source :

Year: 2010

Page: 111-115

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 7

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