We　have　investigated　the　debonding　failure　of　the　through-silicon　via　(TSV)-Cu/Si　interface　during　annealing　treatment　at　425　degrees　C.　The　interface　microstructure　was　characterized　by　two　parameters:　the　TSV-Cu/Si　interface　roughness　and　the　Cu　seed　layer　grain　size.　Scanning　electron　microscopy　observation　of　the　cross-section　of　the　TSV-Cu/Si　interface　was　performed　to　analyze　the　effect　of　the　interface　microstructure　on　its　microcrack　failure.　In　addition,　qualitative　numerical　simulations　were　performed　to　investigate　the　effect　of　the　TSV-Cu/Si　interface　roughness　and　Cu　seed　layer　grain　size　on　the　overall　response　of　the　TSV-Cu/Si　interface　crack.　The　experimental　results　indicate　that　most　of　the　TSV　interfacial　cracks　propagate　along　the　Cu　seed　layer　after　annealing,　and　the　crack　length　of　the　TSV-Cu/Si　interface　increases　with　increasing　interface　roughness　and　Cu　seed　layer　grain　size.　The　numerical　simulation　is　constructed　to　reveal　the　interfacial　crack　mechanism,　and　the　results　suggest　that　the　stress　concentration　in　the　Cu　seed　layer　which　influence　by　interface　roughness　and　Cu　grains　size　is　the　main　driving　force　for　interfacial　cracking.　Based　on　the　experimental　and　simulation　results,　guidelines　for　controlling　the　TSV-Cu/Si　interfacial　cracking　from　the　perspective　of　the　TSV　manufacturing　process　are　proposed.