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Author:

Fang, J. (Fang, J..) (Scholars:方娟) | Lei, D. (Lei, D..)

Indexed by:

Scopus PKU CSCD

Abstract:

To reduce the power consumption, the technology about cache low power was analysed, and a shared cache reconfigurable method in the multi-core processors (CMP) for low power was proposed. First, the cache reconfiguration necessity by the static reconfiguration was analysed; Then, the reconfigurable strategy during cache access was added. Result shows that the method can save about 18% energy consumption, while the performance decline is only 4%.

Keyword:

Low power; Multi-core processors; Reconfigure

Author Community:

  • [ 1 ] [Fang, J.]College of Computer Science, Beijing University of Technology, Beijing 100124, China
  • [ 2 ] [Lei, D.]College of Computer Science, Beijing University of Technology, Beijing 100124, China

Reprint Author's Address:

  • 方娟

    [Fang, J.]College of Computer Science, Beijing University of Technology, Beijing 100124, China

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Source :

Journal of Beijing University of Technology

ISSN: 0254-0037

Year: 2013

Issue: 9

Volume: 39

Page: 1355-1359

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 8

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