A　power-efficient　frequency　compensation　topology,　Impedance　Adapting　Compensation　(IAC),　is　presented　in　this　paper.　This　IAC　topology　has,　on　one　hand,　a　normal　Miller　capacitor,　which　is　still　needed　to　provide　an　internal　negative　feedback　loop,　and　on　the　other　hand,　a　serial　RC　impedance　as　a　load　to　the　intermediate　stage,　improving　performance　parameters　such　as　stability,　gain-bandwidth　product　and　power　dissipation.　A　three-stage　IAC　amplifier　was　implemented　and　fabricated　in　a　0.35　mu　m　CMOS　technology.　Experiment　results　show　that　the　implemented　IAC　amplifier,　driving　a　150　pF　load　capacitance,　achieved　a　gain-bandwidth　product　(GBW)　of　4.4　MHz　while　dissipating　only　30　mu　W　power　with　a　1.5　V　supply.