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This paper presents a low-power and low-noise front-end amplifier (FEA) dedicated to recording and preprocessing biomedical signals for brain-machine interface. The FEA employs a current-reused architecture which adopts an inverter-based differential input stage to achieve considerable g(m)/I efficiency and low noise. With a carefully designed common-mode feedback circuit, the output common-mode voltage of the fully-differential FEA is stabilized within an acceptable margin of error about 1 mV. All transistors in FEA operate in the sub-threshold region, realizing low power consumption. This current-reused FEA implemented in a CMOS 0.18-mu m technology provides a noise efficiency factor (NEF) and power efficiency factor (PEF) of 1.6 and 2.56, respectively, corresponding to an input-referred noise of 2.37 mu V-rms. This FEA consumes only 2 mu A current from 1 V supply and the active area is 0.2 mm x0.2 mm.
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2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS
Year: 2022
Page: 144-148
Cited Count:
WoS CC Cited Count: 1
SCOPUS Cited Count: 1
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 6
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