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Author:

Li, Juzhe (Li, Juzhe.) | Liu, Xu (Liu, Xu.) | Wan, Peiyuan (Wan, Peiyuan.) | Chen, Zhijie (Chen, Zhijie.)

Indexed by:

CPCI-S EI Scopus

Abstract:

This paper presents a 4-channel neural stimulation integrated circuit design with exponential current output. Using exponentially decaying current output for neural stimulation, the excessive headroom voltage of the output stage can be eliminated and the power efficiency of the stimulator can be improved. In this work, the exponential current generation circuit is improved to realize longer duration for stimulation pulse. In addition, a charge balancing technique is used to minimize the residual charge during stimulation. The stimulator IC is implemented in a 180-nm CMOS process, occupying a core area of 1.93 mm(2). The simulation results show that maximum power efficiency of the output stage reaches 90% and the maximum stimulation duration has been increased by 3 times compared to previous work. The results also show that the short-time pulse insertion circuit for charge balancing can maintain the electrode voltage within a safe range (V-ref +/- 50 mV), and the maximum residual charge in a single cycle is only 84 pC.

Keyword:

charge balancing neural stimulator exponentially decaying current power efficiency

Author Community:

  • [ 1 ] [Li, Juzhe]Beijing Univ Technol, Coll Microelect, Beijing, Peoples R China
  • [ 2 ] [Liu, Xu]Beijing Univ Technol, Coll Microelect, Beijing, Peoples R China
  • [ 3 ] [Wan, Peiyuan]Beijing Univ Technol, Coll Microelect, Beijing, Peoples R China
  • [ 4 ] [Chen, Zhijie]Beijing Univ Technol, Coll Microelect, Beijing, Peoples R China

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Source :

2022 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS

Year: 2022

Page: 123-127

Cited Count:

WoS CC Cited Count: 2

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 3

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