A Configurable SPI Interface Based on APB Bus - Details

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Abstract：

A　configurable　SPI　interface　based　on　APB　bus　is　proposed　in　this　paper.　The　SPI　interface　transmission　information　is　configured　through　APB　bus,　which　can　realize　the　master-slave　mode　switching,　4　kinds　of　clock　transmission　mode　switching　and　MSB/LSB　communication　mode　switching.　Meanwhile　the　transmission　rate　can　be　selected　and　the　transmission　length　can　be　variable　from　1　to　32　bits.　Based　on　the　SPI　transmission　protocol,　the　proposed　design　uses　a　finite　state　machine　method　to　control　the　transmission　timing　of　the　SPI　interface.　The　design　was　verified　through　RTL　simulation　and　FPGA　verification.　The　verification　results　show　that　the　functional　of　SPI　interface　is　correct　and　the　data　transmission　is　stable.　©　2020　IEEE.

Keyword：

Field programmable gate arrays (FPGA) Buses Integrated circuit design Interface states

Author Community：

[ 1 ] [Yang, Jiang]Beijing University of Technology, Beijing Embedded System Key Lab, Faculty of Information Technology, Beijing, China
[ 2 ] [Xiao, Yile]Beijing Smartchip Microelectronics Technology Company Limited, Beijing, China
[ 3 ] [Li, Dejian]Beijing Smartchip Microelectronics Technology Company Limited, Beijing, China
[ 4 ] [Li, Zheng]Beijing University of Technology, Beijing Embedded System Key Lab, Faculty of Information Technology, Beijing, China
[ 5 ] [Chen, Zhijie]Beijing University of Technology, Beijing Embedded System Key Lab, Faculty of Information Technology, Beijing, China
[ 6 ] [Wan, Peiyuan]Beijing University of Technology, Beijing Embedded System Key Lab, Faculty of Information Technology, Beijing, China

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Source ：

ISSN： 2163-5048

Year： 2020

Volume： 2020-October

Page： 73-76

Language： English

Cited Count：

WoS CC Cited Count： 0

SCOPUS Cited Count： 4

ESI Highly Cited Papers on the List： 0 Unfold All

WanFang Cited Count：

Chinese Cited Count：

30 Days PV： 8

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