Design of ethernet platform of SOPC based on ARM soft core - Details

Author：

He, Min (He, Min.) | Peng, Xiaohong (Peng, Xiaohong.) | Li, Xiaodan (Li, Xiaodan.) | Wang, Rui (Wang, Rui.) | Du, Jianing (Du, Jianing.)

Indexed by：

EI Scopus

Abstract：

This　article　introduces　the　basic　concept　of　on-chip　programmable　system　and　explains　how　to　use　ARM　Design　Start　IP　core　to　design　peripherals　on　FPGA　to　build　your　own　system,　focusing　on　the　description　of　AHB　peripheral　modules　and　implementation　of　software.　This　paper　presents　a　network　system　built　with　W5500　chip　and　ARM　Cortex　M0　soft　core,　which　is　simple　in　structure　and　easy　to　implement.　©　2018　IEEE.

Keyword：

Integrated circuit design ARM processors Field programmable gate arrays (FPGA) Ethernet

Author Community：

[ 1 ] [He, Min]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 2 ] [Peng, Xiaohong]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 3 ] [Li, Xiaodan]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 4 ] [Wang, Rui]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China
[ 5 ] [Du, Jianing]VLSI and System Lab, Beijing University of Technology, Beijing; 100124, China

Reprint Author's Address：

[peng, xiaohong]vlsi and system lab, beijing university of technology, beijing; 100124, china

Email：

pengxiaohong@bjut.edu.cn

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Source ：

ISSN： 2163-5048

Year： 2018

Volume： 2018-November

Page： 107-110

Language： English

Cited Count：

WoS CC Cited Count： 0

SCOPUS Cited Count：

ESI Highly Cited Papers on the List： 0 Unfold All

WanFang Cited Count：

Chinese Cited Count：

30 Days PV： 10

Affiliated Colleges：

信息科学技术学院本学院/部未明确归属的数据

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