Design of High-speed CMOS Image Sensor Data Acquisition Based on FPGA - Details

Author：

Xia, Yifei (Xia, Yifei.) | He, Wei (He, Wei.) | Cui, Jinling (Cui, Jinling.) | Wu, Qiang (Wu, Qiang.) | Zheng, Xin (Zheng, Xin.)

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Abstract：

In　recent　years,　LVDS　transmission　has　been　widely　used　in　high-speed　information　transmission　[1],　and　FPGA　is　used　as　a　receiver　chip　for　LVDS　signals　in　high-speed　data　transmission　examples.　Compared　with　the　traditional　LVDS　data　interaction　based　on　SRIO　[2],　AROURA　[3]　and　other　protocols,　this　paper　designs　a　data　processing　scheme　for　high-speed　CMOS　under　the　FPGA　platform,　high-speed　CMOS　data　output　without　coding,　multi-channel　(from　tens　to　hundreds　of　channels)　parallel　transmission　form,　so　that　the　timing　control　and　data　restoration　of　the　acquisition　end　is　more　difficult,　this　design　through　the　multi-channel　LVDS　data　bit　reception,　parallel　processing　and　channel　synchronization　work.　The　design　of　the　whole　set　of　data　acquisition　scheme　is　completed,　and　the　method　is　verified　by　experiments,　which　realizes　the　reception,　parallel　processing　and　channel　synchronization　of　LVDS　data　in　each　channel,　ensuring　the　stability　and　reliability　of　data　during　transmission.　©　2023　ACM.

Keyword：

Field programmable gate arrays (FPGA) CMOS integrated circuits Integrated circuit design Data acquisition Data handling

Author Community：

[ 1 ] [Xia, Yifei]Beijing University of Technology, China
[ 2 ] [He, Wei]Beijing University of Technology, China
[ 3 ] [Cui, Jinling]Beijing University of Technology, China
[ 4 ] [Wu, Qiang]Beijing University of Technology, China
[ 5 ] [Zheng, Xin]Beijing University of Technology, China

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Year： 2023

Page： 537-546

Language： English

Cited Count：

WoS CC Cited Count： 0

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ESI Highly Cited Papers on the List： 0 Unfold All

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30 Days PV： 4

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