Based　on　a　400　V　power　bipolar　integrated　device　(BJT　and　a　anti-parallel　p-i-n　diode　integrated　on　the　same　chip)　and　through　simulation　and　experimental　test,　some　fundamental　concepts　and　physical　images　were　established　concerning　the　influence　of　the　parasitic　lateral　p-n-p　transistor　on　the　integrated　device　and　the　dependence　of　this　influence　on　the　distance　between　the　main　transistor　and　the　internal　diode.　Finally,　the　optimized　design　of　the　above-mentioned　distance　was　proposed.　These　provide　a　theoretical　basis　for　understanding　the　issue　and　devising　new　methods　to　isolate　the　main　transistor　and　the　internal　diode.