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Abstract：
Based on Deterministic Finite Automaton (DFA) and combinational logic circuits, an implementation of a model machine using Verilog HDL and top-down method is proposed This paper describes how to design each of its parts with the schema of DFA in Verilog HDL and simulates the machine in the end.
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PROCEEDINGS OF THE FIRST INTERNATIONAL WORKSHOP ON EDUCATION TECHNOLOGY AND COMPUTER SCIENCE, VOL II
Year： 2009
Page： 1038-,
Language： English
Cited Count：
WoS CC Cited Count： 0
SCOPUS Cited Count：
ESI Highly Cited Papers on the List： 0 Unfold All
WanFang Cited Count：
Chinese Cited Count：
30 Days PV： 8
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