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Abstract：
This paper analyzes the implementation of high-speed high-resolution data conversion system based on Subranging A/D model in detail. We use a 10 bit ADC and an 8 bit ADC to construct the Subranging A/D system and then make a simulation by QuartusII. The result of the experiment shows that the system＇s sampling rates is 17MHz, and the resolution is 16 bit, so it can solve an antinomy between sampling rates and resolution which is prevalent in current market.
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ICEMI 2007: PROCEEDINGS OF 2007 8TH INTERNATIONAL CONFERENCE ON ELECTRONIC MEASUREMENT & INSTRUMENTS, VOL IV
Year： 2007
Page： 862-864
Language： English
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WoS CC Cited Count： 0
SCOPUS Cited Count：
ESI Highly Cited Papers on the List： 0 Unfold All
WanFang Cited Count：
Chinese Cited Count：
30 Days PV： 4
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