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Abstract：
This paper is based on the Zynq UltraScale plus EV series MPSoc hardware platform. To meet the demand of 1080P@500FPS high-speed video with large capacity data storage and high performance, multiple Cortex-A53 cores on the ARM side of the processor are implemented with shared memory, inter-core interrupt mechanism, and multi-core supervised inter-core communication mechanism. The system＇s multi-task processing and parallel control are realized through multi-core scheduling, which effectively improves the system＇s high integration, flexibility, and reliability. © 2023 ACM.
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Year： 2023
Page： 554-561
Language： English
Cited Count：
WoS CC Cited Count： 0
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ESI Highly Cited Papers on the List： 0 Unfold All
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30 Days PV： 12
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