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Author:

Wang, Xiaoxue (Wang, Xiaoxue.) | Zhang, Wanrong (Zhang, Wanrong.) | Na, Weicong (Na, Weicong.) | Jin, Dongyue (Jin, Dongyue.) | Xie, Hongyun (Xie, Hongyun.) | Song, Jinda (Song, Jinda.) | Cao, Jian (Cao, Jian.) | Chen, Hanmin (Chen, Hanmin.)

Indexed by:

EI Scopus SCIE

Abstract:

An improved gyrator-capacitor (GC) architecture of active inductor (AI) is proposed, which consists of a dual-loop configuration, mainly including a negative feedback loop (NFL) and a positive feedback loop (PFL) and hence is denoted as positive-negative-feedback-GC (PNF-GC). The in-depth cooperation of above dual-loop configuration in conjunction with the dynamically and synergistically tuning of external voltages in different building modules ensure high Q values under low-frequency range and alleviate the degradation impact of the parallel conductance Gp on Q values under high-frequency range, and thereby the proposed PNF-GC architecture can make a single AI achieve high Q values under various radio-frequency bands. Subsequently, based on the TSMC's 0.18-μm CMOS process, a prototype circuit of AI based on PNF-GC architecture as an exemplary example and its layout are given, so as to demonstrate the performance under quad bands including X, C, S and L bands. The results from post-layout simulation indicate that within the frequency range of the X-band (8–12 GHz), the Q values are all higher than 20, with a maximum Q value of 1068 at 10.2 GHz; within the C-band (4–8 GHz), the all Q values exceed 50 and the maximum Q value reaches 1006 at 6 GHz; within the S-band (2–4 GHz), the all Q values surpass 250, with a peak Q value of 1033 at 3 GHz; and within the L-band (1–2 GHz), the Q values are all higher than 590 and a peak Q value of 1026 appears at 1.5 GHz. The above proposed PNF-GC architecture of AI, which makes a single AI have an ability to obtain high Q within a wide frequency range, is of important significance to frequency reconfigurability of miniaturized RFICs. © 2024 Elsevier Ltd

Keyword:

Gyrators Capacitor bank Electric inductors CMOS integrated circuits

Author Community:

  • [ 1 ] [Wang, Xiaoxue]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 2 ] [Zhang, Wanrong]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 3 ] [Na, Weicong]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 4 ] [Jin, Dongyue]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 5 ] [Xie, Hongyun]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 6 ] [Song, Jinda]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 7 ] [Cao, Jian]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China
  • [ 8 ] [Chen, Hanmin]School of Information Science and Technology, Beijing University of Technology, Beijing; 100124, China

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Source :

Microelectronics Journal

ISSN: 0959-8324

Year: 2025

Volume: 156

2 . 2 0 0

JCR@2022

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 11

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