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Author:

Gu, Jian (Gu, Jian.) | Lei, Yongping (Lei, Yongping.) (Scholars:雷永平) | Lin, Jian (Lin, Jian.) | Fu, Hanguang (Fu, Hanguang.) (Scholars:符寒光) | Wu, Zhongwei (Wu, Zhongwei.)

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EI Scopus

Abstract:

the reliability of solder joint under drop impact is a crucial research area due to the smaller and higher density. The test standard for board level has been published by JEDEC in detail. Based on JEDEC board level drop test standard, the square board with four symmetry component is designed in this paper. The structure size of test board is 0.5mm×121mm×121mm. The distance of the center component to the center of test board is 15mm. The first six modal frequency is 23.56Hz, 136.37Hz, 138.53Hz, 165.98Hz, 346.35Hz and 394.56Hz respectively. This Design benefits for the board level drop life of solder joint statistics analysis. And the 0.5mm thickness design can be used as replacement test board to analyze the failure mechanism of solder joint under relative high drop impact level. © 2016 IEEE.

Keyword:

Drops Printed circuit boards Timing circuits Reliability Printed circuit design Electronics packaging Failure (mechanical)

Author Community:

  • [ 1 ] [Gu, Jian]College of Materials Science and Engineering, Beijing University of Technology, Beijing, China
  • [ 2 ] [Lei, Yongping]College of Materials Science and Engineering, Beijing University of Technology, Beijing, China
  • [ 3 ] [Lin, Jian]College of Materials Science and Engineering, Beijing University of Technology, Beijing, China
  • [ 4 ] [Fu, Hanguang]College of Materials Science and Engineering, Beijing University of Technology, Beijing, China
  • [ 5 ] [Wu, Zhongwei]College of Materials Science and Engineering, Beijing University of Technology, Beijing, China

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Year: 2016

Page: 588-591

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 2

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 10

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