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Author:

Qin, Fei (Qin, Fei.) (Scholars:秦飞) | Zhao, Shuai (Zhao, Shuai.) | Dai, Yanwei (Dai, Yanwei.) (Scholars:代岩伟) | Yang, Mengke (Yang, Mengke.) | Xiang, Min (Xiang, Min.) | Yu, Daquan (Yu, Daquan.)

Indexed by:

EI Scopus SCIE

Abstract:

A six-side molded wafer-level chip scale package (mWLCSP) is a novel and attractive packaging method for smart phone applications due to its lower cost, better electrical performance, and higher long-term reliability. Nevertheless, wafer warpage in different manufacturing processes is a significant issue for the six-side mWLCSP. This article focuses on wafer warpage evolution in different packaging processes and the development of control method for the six-side mWLCSP. A quarter wafer-level finite-element (FE) model and a strip-level FE model were established to simulate the actual packaging processes by element birth and death method and restart technology. Both the FE models were proved quite efficient and accurate for warpage prediction compared to the experimental results. The effects of geometric parameters and material parameters on the maximum warpage value were studied based on the two established FE warpage models, and some recommendations were given for warpage optimization. Based on the above studies, an improved manufacturing process flow for the six-side mWLCSP was presented and proved feasible to control the maximum warpage value under 3 mm. It offers an insight work for the development and warpage control of the six-side mWLCSP and other wafer-level molded packages.

Keyword:

Control Semiconductor device modeling wafer-level compression molding Semiconductor device reliability Finite element analysis Silicon six-side molded wafer-level chip scale package (mWLCSP) finite-element method (FEM) warpage Computational modeling Packaging

Author Community:

  • [ 1 ] [Qin, Fei]Beijing Univ Technol, Beijing Key Lab Adv Mfg Technol, Coll Mech Engn & Appl Elect Technol, Inst Elect Packaging Technol & Reliabil, Beijing 100124, Peoples R China
  • [ 2 ] [Zhao, Shuai]Beijing Univ Technol, Beijing Key Lab Adv Mfg Technol, Coll Mech Engn & Appl Elect Technol, Inst Elect Packaging Technol & Reliabil, Beijing 100124, Peoples R China
  • [ 3 ] [Dai, Yanwei]Beijing Univ Technol, Beijing Key Lab Adv Mfg Technol, Coll Mech Engn & Appl Elect Technol, Inst Elect Packaging Technol & Reliabil, Beijing 100124, Peoples R China
  • [ 4 ] [Yang, Mengke]Ericsson China Commun Co Ltd, Beijing 100102, Peoples R China
  • [ 5 ] [Xiang, Min]Huatian Technol Kunshan Elect Co Ltd, Kunshan 215300, Peoples R China
  • [ 6 ] [Yu, Daquan]Huatian Technol Kunshan Elect Co Ltd, Kunshan 215300, Peoples R China
  • [ 7 ] [Yu, Daquan]Xiamen Univ, Sch Elect Sci & Engn, Xiamen 361005, Peoples R China

Reprint Author's Address:

  • 代岩伟

    [Dai, Yanwei]Beijing Univ Technol, Beijing Key Lab Adv Mfg Technol, Coll Mech Engn & Appl Elect Technol, Inst Elect Packaging Technol & Reliabil, Beijing 100124, Peoples R China

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Source :

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY

ISSN: 2156-3950

Year: 2020

Issue: 4

Volume: 10

Page: 730-738

2 . 2 0 0

JCR@2022

ESI Discipline: ENGINEERING;

ESI HC Threshold:115

Cited Count:

WoS CC Cited Count: 14

SCOPUS Cited Count: 23

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 12

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