A QSPI Interface Supporting 'Bits-Decoding' for High-Speed Access to Flash - Details

Author：

Indexed by：

EI Scopus

Abstract：

A　QSPI　interface　is　proposed　for　accessing　QSPI　flash　in　this　paper.　This　proposed　QSPI　interface　transmission　information　for　the　master　supports　access　to　3　types　of　flash　by　using　the　Bit-decoding　algorithm,　that　is,　the　data　is　received　from　MSB　to　LSB　in　order　into　the　master.　This　QSPI　interface　includes　SPI　mode,　DSPI　mode　and　QSPI　mode.　The　SPI　mode　has　4　clock　modes　to　switch,　for　receiving　and　transmitting　the　information.　The　DSPI　mode　and　QSPI　mode　is　utilized　when　needed　for　high-speed　access　to　flash.　Based　on　the　QSPI　transmission　protocol,　a　finite　state　machine　is　used　in　this　QSPI　interface　design,　which　to　control　the　transmission　timing.　The　design　is　verified　through　RTL　simulation.　The　simulation　result　shows　the　correct　functions　and　transports　stable　data.　　©　2022　IEEE.

Keyword：

QSPI interface SPI interface Bit-decoding flash

Author Community：

[ 1 ] [Zhang Y.]Beijing University of Technology, Beijing Embedded Systems Key Lab, College of Microelectronics, Faculty of Information Technology, Beijing, China
[ 2 ] [Shen C.]Beijing Smartchip Microelectronics Technology Company Limited, Beijing, China
[ 3 ] [Tan L.]Beijing Smartchip Microelectronics Technology Company Limited, Beijing, China
[ 4 ] [Gao Z.]Beijing University of Technology, Beijing Embedded Systems Key Lab, College of Microelectronics, Faculty of Information Technology, Beijing, China
[ 5 ] [Chen Z.]Beijing University of Technology, Beijing Embedded Systems Key Lab, College of Microelectronics, Faculty of Information Technology, Beijing, China
[ 6 ] [Liu X.]Beijing University of Technology, Beijing Embedded Systems Key Lab, College of Microelectronics, Faculty of Information Technology, Beijing, China
[ 7 ] [Wan P.]Beijing University of Technology, Beijing Embedded Systems Key Lab, College of Microelectronics, Faculty of Information Technology, Beijing, China

Reprint Author's Address：

Email：

Show more details

Related Keywords：

A Configurable SPI Interface Based on APB Bus
2020，14th IEEE International Conference on Anti-Counterfeiting, Security, and Identification, ASID 2020
A Configurable SPI Interface Based on APB Bus
2020，14th IEEE International Conference on Anti-Counterfeiting, Security, and Identification (IEEE_ASID)
基于AMBA APB总线的Nand Flash控制器的设计
2013，微型机与应用
片上NOR-flash内嵌自测试的算法选择
2010，电子元器件应用

Source ：

ISSN： 2163-5048

Year： 2022

Volume： 2022-December

Page： 24-27

Language： English

Cited Count：

WoS CC Cited Count： 0

SCOPUS Cited Count： 1

ESI Highly Cited Papers on the List： 0 Unfold All

WanFang Cited Count：

Chinese Cited Count：

30 Days PV： 6

Affiliated Colleges：

Get Fulltext

DOI Library Discovery Baidu Scholar Search SCOPUS

Type
Departments

All Years Choose Year From to