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Abstract:
A configurable SPI interface based on APB bus is proposed in this paper. The SPE interface transmission information is configured through APB bus, which can realize the master-slave mode switching, 4 kinds of clock transmission mode switching and MSB/LSB communication mode switching. Meanwhile the transmission rate can be selected and the transmission length can he variable from 1 to 32 hits. Based on the SPI transmission protocol, the proposed design uses a finite state machine method to control the transmission timing of the SPI interface. The design was verified through RTL simulation and FPGA verification. The verification results show that the functional of SPI interface is correct and the data transmission is stable.
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2020 IEEE 14TH INTERNATIONAL CONFERENCE ON ANTI-COUNTERFEITING, SECURITY, AND IDENTIFICATION (ASID)
ISSN: 2163-5048
Year: 2020
Page: 73-76
Language: English
Cited Count:
WoS CC Cited Count: 0
SCOPUS Cited Count:
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 9
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