The　ever-expanding　scale　of　integrated　circuits　has　brought　about　a　significant　rise　in　the　design　risks　associated　with　radiation-resistant　integrated　circuit　chips.　Traditional　single-particle　experimental　methods,　with　their　iterative　design　approach,　are　increasingly　ill-suited　for　the　challenges　posed　by　large-scale　integrated　circuits.　In　response,　this　article　introduces　a　novel　sensitivity-aware　single-particle　radiation　effects　simulation　framework　tailored　for　System-on-Chip　platforms.　Based　on　SVM　algorithm　we　have　implemented　fast　finding　and　classification　of　sensitive　circuit　nodes.　Additionally,　the　methodology　automates　soft　error　analysis　across　the　entire　software　stack.　The　study　includes　practical　experiments　focusing　on　RISC-V　architecture,　encompassing　core　components,　buses,　and　memory　systems.　It　culminates　in　the　establishment　of　databases　for　Single　Event　Upsets　(SEU)　and　Single　Event　Transients　(SET),　showcasing　the　practical　efficacy　of　the　proposed　methodology　in　addressing　radiation-induced　challenges　at　the　scale　of　contemporary　integrated　circuits.　Experimental　results　have　shown　up　to　12.78×　speed-up　on　the　basis　of　achieving　94.58%　accuracy.　©　2024　Copyright　is　held　by　the　owner/author(s).　Publication　rights　licensed　to　ACM.