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Author:

Yuan, Ying (Yuan, Ying.) | Wu, Wuchen (Wu, Wuchen.) (Scholars:吴武臣) | Hou, Ligang (Hou, Ligang.) | Geng, Shuqin (Geng, Shuqin.) | Zhou, Zhonghua (Zhou, Zhonghua.) | Liu, Qi (Liu, Qi.)

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EI Scopus

Abstract:

As a important step in SoC design, good architecture design is the foundation to ensure the final structure to meet the design specifications. In paper, the minimal SoC system used for performance compare between basic architectures is defined, which is consisted of embedded processor, on chip bus, on chip memory and IP (GPIO). Then six SoC architecture based on 32 bit embedded RISC processor is studied, and comparison and analysis are discussed. © 2012 IEEE.

Keyword:

Intelligent systems Systems analysis Integrated circuit design System-on-chip Image coding Programmable logic controllers Reduced instruction set computing

Author Community:

  • [ 1 ] [Yuan, Ying]Beijing University of Technology, Beijing, 100124, China
  • [ 2 ] [Wu, Wuchen]Beijing University of Technology, Beijing, 100124, China
  • [ 3 ] [Hou, Ligang]Beijing University of Technology, Beijing, 100124, China
  • [ 4 ] [Geng, Shuqin]Beijing University of Technology, Beijing, 100124, China
  • [ 5 ] [Zhou, Zhonghua]Beijing University of Technology, Beijing, 100124, China
  • [ 6 ] [Liu, Qi]Beijing University of Technology, Beijing, 100124, China

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Source :

Year: 2012

Page: 1339-1342

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 7

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