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Abstract:
This paper presents a 16-channel power-efficient neural/muscular stimulation integrated circuit for peripheral nerve prosthesis. First, the theoretical analysis is presented to show the power efficiency optimization in a stimulator. Moreover, a continuous-time, biphasic exponential-current-waveform generation circuit is designed based on Taylor series approximation and implemented in the proposed stimulation chip to optimize the power efficiency. In the 16-channel stimulator chip design, each channel of the stimulator consists of a current copier, an exponential current generator, an active charge-balancing circuit, and a 24-V output stage. Stimulation amplitude, pulse width, and frequency can be set and adjusted through an external field-programmable gate array by sending serial commands. Finally, the proposed stimulator chip has been fabricated in a 0.18-m advanced complementary metal-oxide-semiconductor process with 24-V laterally diffused metal oxide semiconductor option. The maximum stimulation power efficiency of 95.9% is achieved at the output stage with an electrode model of 10-k resistance and 100-nF capacitance. Animal experiment results further demonstrate the power efficiency improvement and effectiveness of the stimulator.
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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
ISSN: 0098-9886
Year: 2018
Issue: 4
Volume: 46
Page: 692-706
2 . 3 0 0
JCR@2022
ESI Discipline: ENGINEERING;
ESI HC Threshold:156
JCR Journal Grade:3
Cited Count:
WoS CC Cited Count: 10
SCOPUS Cited Count: 12
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 12
Affiliated Colleges: