This　article　presents　the　experimental　characterization　of　SiC　MOSFETs　exposed　to　heavy-ion　irradiation.　Different　leakage　paths　related　to　the　drain　bias　used　during　the　tests　are　observed,　suggesting　different　damage　sites　in　the　devices,　which　can　be　further　verified　through　the　post-irradiation　measurements.　TCAD　simulations　are　utilized　to　explore　the　underlying　failure　mechanisms.　Based　on　the　evolution　of　the　gate　oxide　field,　it　is　shown　that　the　damage　first　occurs　in　the　middle　of　the　JFET　region,　while　gradually　spreads　to　the　channel　region　with　the　increase　of　drain　bias,　but　terminates　at　the　source　region.　A　preliminary　model　to　roughly　emulate　the　drain　bias　dependence　of　such　degradation　behaviors　is　developed,　and　the　simulation　results　match　the　experiments　well.　Additionally,　the　emission　microscope　(EMMI)　is　carried　out　so　as　to　detect　the　latent　damage　at　the　die　level.　The　findings　in　this　article　demonstrate　that　more　attention　should　be　paid　to　the　damaged　gate　oxide　induced　by　the　heavy-ion　strike　before　SiC　MOSFETs　could　act　as　a　drop-in　replacement　of　Si-based　counterparts　in　avionic　applications.