Polysilicon　thin　film　transistors　have　broad　application　prospects　in　high-performance　flat　panel　displays　and　flexible　wearable　devices　due　to　their　high　carrier　mobility　and　good　stability.　However,　due　to　process　conditions　and　other　reasons,　there　are　traps　inside,　and　under　some　electrical　stress　conditions,　its　electrical　properties　will　degrade.　Here　we　report　the　changes　in　electrical　characteristics　of　p-type　polysilicon　thin　film　transistors　with　stress　time　at　a　negative　gate　voltage　of　-20V　and　a　temperature　of　60°C.　It　is　obtained　that　the　transfer　characteristics　of　the　p-type　polysilicon　thin　film　transistor　move　in　the　negative　direction　with　the　increase　of　Negative　Bias　Temperature　Instability　time,　and　with　the　increase　of　SS　degradation,　and　the　total　trap　state　inside　it　is　calculated　by　SS,　which　provides　a　theoretical　basis　for　improving　the　reliability　of　the　device.　©　Published　under　licence　by　IOP　Publishing　Ltd.