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The 4-bit absolute value detector is a common circuit design used in logical circuit bit operations. The needle for the current absolute value detection design method, mostly using a semi conditioner or comparator in combination with a multi-way replicator to solve problems such as the advance, which inevitably leads to a decrease in the performance of the circuit. In this article, we have further optimized the circuitry by combining the traditional semiconductor or comparator with the multi-directional replicator. First, this paper has achieved the absolute value conversion function in combination with the comparator and the multi-way replicator. Next, we calculated the corresponding indicators for the two designs. Specifically, because of the complexity of the comparator to solve the advance problem, we abandoned the design of a comparator combined with a multi-way replicator. The next step is to connect a comparative circuit to the output of the circuit of the absolute value conversion function and ultimately realize the detection of absolute values. Finally, is the energy optimization, through the design and determination of the relevant parameters, we sacrifice part of the circuit delay to obtain lower energy losses. © 2025 SPIE.
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ISSN: 0277-786X
Year: 2025
Volume: 13552
Language: English
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ESI Highly Cited Papers on the List: 0 Unfold All
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30 Days PV: 0
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