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Author:

Chen, Jian-Xin (Chen, Jian-Xin.) | Wu, Nan (Wu, Nan.) | Shi, Chen (Shi, Chen.) | Yang, Wei-Ming (Yang, Wei-Ming.)

Indexed by:

EI Scopus PKU CSCD

Abstract:

Aiming at improving accuracy of photoetching technology in conventional double-mesa process for SiGe heterojunction bipolar transistor (HBT), this paper introduced buried-metal layers and developed silicon based buried-metal self-aligned process in order to increase the mesa area utilization efficiency. Novel process has advantages of smaller junction area, larger metal-semiconductor contact area and fewer pinhole fabrication defects, with no increase of fabrication difficulties or advancement of photolithography equipment.

Keyword:

Silicon alloys Equipment Fabrication Heterojunction bipolar transistors Semiconductor junctions Alignment Photolithography Defects Semiconductor metal boundaries

Author Community:

  • [ 1 ] [Chen, Jian-Xin]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
  • [ 2 ] [Wu, Nan]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
  • [ 3 ] [Shi, Chen]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China
  • [ 4 ] [Yang, Wei-Ming]College of Electronic Information and Control Engineering, Beijing University of Technology, Beijing 100022, China

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Source :

Journal of Beijing University of Technology

ISSN: 0254-0037

Year: 2007

Issue: 10

Volume: 33

Page: 1048-1051

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 6

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